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LT3743
OPERATION
The LT3743 utilizes fixed frequency, average current
mode control to accurately regulate the inductor current,
independently from the output voltage. This is an ideal
solution for applications requiring a regulated current
source including driving high current LEDs where the
forward junction voltage can range from 2V to 6V with a
dynamic resistance of 20mΩ to 40mΩ. The control loop
will regulate the current in the inductor at an accuracy
of 6%. For additional operation information, refer to the
Block Diagram in Figure 1.
The control loop has two independent reference inputs,
determined by the analog control pins, CTRL_H and
CTRL_L. When the CTRL_SEL pin is low, the control loop
uses the reference determined by the CTRL_L pin and
when high, the loop uses the reference determined by
the CTRL_H pin. The analog voltage at the CTRL_L and
CTRL_H pins is buffered and produces a reference voltage
across an internal resistor. The internal buffers have a 1.5V
clamp on the output, limiting the analog control range of
the CTRL_L and CTRL_H pins from 0V to 1.5V. The aver-
age current mode control loop uses the internal reference
voltage to regulate the inductor current, as a voltage drop
across the external sense resistor, R S .
In many applications, a rapid transition between the two
regulated current states is desirable to provide background
LED color mixing for pure colors in an RGB projector
or display. For this purpose, pulse width modulation
dimming can be achieved with both the PWM and
CTRL_SEL pins. When the PWM pin is low, the regulated
current in the inductor is zero and both output capacitors
are disconnected. When the PWM pin is high, and the
CTRL_SEL pin is low, the regulated current in the inductor
is determined by the analog voltage at the CTRL_L pin.
When the PWM and CTRL_SEL pins are both high, the
regulated current in the inductor is determined by the
analog voltage at the CTRL_H pin.
The LT3743 uses a unique switched output capacitor
topology and two independent compensation networks to
transition between the two regulated current states in less
than 2μs. When the CTRL_SEL pin is low and the PWM
pin is high, the PWMGL output pin is high, switching in
the output capacitor for the CTRL_L current level. The
CTRL_L output capacitor stores the LED forward voltage
drop when the control loop regulates the low current
level. When the CTRL_SEL pin changes to the high state,
a 150ns delay ensures that the output capacitors are not
connected at the same time. After this delay, the output
capacitor for the CTRL_H level is switched in when
PWMGH goes high and immediately delivers current to the
LED. The CTRL_H output capacitor has the voltage drop
of the LED with the regulated current determined by the
analog voltage at the CTRL_H pin. To achieve minimum
transition delay, the inductor is precharged to 70% of the
regulation current level just after the PWMGH pin goes high.
Conversely, when the PWM pin goes low, the inductor is
discharged to 70% of the low current level before normal
switching at the low current level commences. The error
amplifier for the average current mode control loop also
has a common mode lockout that regulates the inductor
current so that the error amplifier is never operated out of
the common mode range. The common mode range is with
an output voltage from 0V to 2V below the V IN supply rail.
The overcurrent set point is equal to the high level regulated
current level set by the CTRL_H pin with an additional
23mV offset between the SENSE + and SENSE – pins. The
overcurrent is limited on a cycle-by-cycle basis; shutting
switching down once the overcurrent level is reached.
Overcurrent is not soft started.
The output voltage may be limited with a resistor divider
from the output back to the FB pin. The reference at the
FB pin is 1.0V. If the output voltage level is high enough
to engage the voltage loop, the regulated inductor current
will be reduced so that the output voltage is limited. If the
voltage at the FB pin reaches 1.3V (30% higher than the
regulation level), an internal open-LED flag is set, shutting
down switching for 13μs and switching in both output
capacitors to fully drain the inductor’s current.
During start-up, the SS pin is held low until the first time
the PWM pin goes high. Once the PWM signal goes high,
the capacitor at the SS pin is charged with a 5.5μA current
source. The internal buffers for the CTRL_L and CTRL_H
signals are limited by the voltage at the SS pin, slowly
ramping the regulated inductor current to the current
determined by the voltage at the CTRL_H or CTRL_L pins.
3743fd
12
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